Post-etch photo resist strip is a common procedure used throughout many semiconductor process steps. Properly removing the resist without imposing extraneous damage to the underlying films is a paramount requirement for reliable and functioning electrical devices.

On some process steps like DRAM metal etch, aggressive chemistries are required to remove the films, which in turn create byproducts (e.g. AlFx) that coat the structure's sidewalls and surfaces. These deposits may have deleterious effects if they are not thoroughly removed. Numerous potential yield issues such as high contact resistance/opens, shorts caused by voids, and line-bridging can result. For contact structures, device charging can have a devastating effect. Allowing a slow accumulation of deposits on the reactor chamber will also decrease its useful life between wet cleans. Tool utilization and efficiencies may be degraded due to premature particle problems.

To mitigate charging issues, processing solutions today typically require a down stream remote plasma source that utilizes soft chemistries and low power to remove these resist films. Determining when the resist is properly removed is important for both process control and manufacturing throughput. Due to the separation of the plasma from the wafer, standard OES approaches are not suited for this application. Utilizing Pivotal's AsherFD product, the ashing fault detection solution can identify the amount of targeted effluents remaining in the chamber. The presence or absence of certain species indicates that chemical reactions on the wafer surface have completed. This signal is an indication of the ashing end point.

AsherFD™ Benefits

Pivotal's AsherFD application can prevent the following failure mechanisms:

• Metal etch over-ashing, which causes hardening of polymers, potential shorts, sputtering, voids with misaligned features, and general productivity inefficiencies
• Metal etch under-ashing, which causes residual polymers, contact resistance, opens, localized potential micro-corrosion
• Poly etch RIE over-ashing can cause detrimental silicon loss and potential gate charging damage
• Poly etch under-ashing will cause residual polymers; this in turn will have a direct or indirect effect on, L_eff, contact resistance, and I_sat